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Microprocessors Notes - Ebook download as PDF File .pdf), Text File .txt) or read notes by arun kumar notes by arun kumarnotes by arun kumarnotes by arun system, CPU Architecture, Machine language instructions, Instruction. Power Electronics Notes by Arunkumar G for 7th sem ECE. Microcontroller Notes by Arunkumar G for 4th sem ECE. Digital Communication Notes by Arunkumar G for 6th sem ECE. 7th sem sjbit notes and assignments. COMPUTER COMMUNICATION NETWORKS [10EC71] Assignment Notes DSP ALGORITHMS.

Microprocessor 8086 Notes By Arun Kumar Pdf

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PDF. Arun kumar notes for microprocessor(N/a). Download microcontroller notes by arunkumar G full chapter notes for Assembly language of , Lecture. LECTURE NOTES In the family of 16 bit microprocessors, Intel's was The architecture of supports a 16 bit ALU, a set of M Krishna kumar. Handwriten notes by arun kumar pdf, ask latest information, abstract, report, presentation. Notes for electronics and communication engineering students direct.

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Subject of vtu and that is extraordinary as microprocessor. Ofc notes by arun kumar. About microprocessor. Notes by arun kumar pdf. Arun kumar microprocessor notes pdf, 7th sem operating system notes, download arun kumar. Monroe is another person who introduced electronic calculators, whose four-function models the size of cash register. In , Herman Hollerith developed the punched card for storing data, basically the idea was of Jaquard.

He also developed a mechanical machine, driven by one of the new electric motors that counted, sorted and collated information stored on punched cards. The punched cards used in computer systems are often called Hollerith cards, In honor of Herman Hollerith.

The 12bit code used on a punched card is called the Hollerith code. Electric motor driven mechanical machines dominated the computing world until the German inventor konrad Zuse constructed the first electronic calculating machine, Z3 in the year Z3 was used in aircraft and missile design during world war II for the German war effort.

In the year , Allan Turing invented the first electronic computing system made of vacuum tubes, which is called as Colossus. Colossus was not programmable; it was a fixed-program computer system, called as special purpose computer. The first general-purpose, programmable electronic computer system was developed in at the University of Pennsylvania. This massive machine weighted over 30 tons, yet performed only about , operations per second.

More advancement followed in the computer world with the development of the transistor in at Bell labs followed by the invention of integrated circuit in by jack Kilby of Texas instruments. He also developed a mechanical machine.

The 12bit code used on a punched card is called the Hollerith code. In Allan Turing invented the first electronic computing system made of vacuum tubes.

The workers changed the electrical connections on plug boards that looked like early telephone switch boards. The ENIAC was programmed by rewriting its circuits — a process that took many workers several days to accomplish. It was fabricated with the Dept of ECE. Monroe is another person who introduced electronic calculators.

The Microprocessor age: With the invention of integrated circuit technology. Colossus was not programmable. Herman Hollerith developed the punched card for storing data. In honor of Herman Hollerith. It addresses a mere 4-bit wide memory locations. This massive machine weighted over 30 tons. Microprocessor 10EC62 by Blaise Pascal.

Z3 in the year In the year Electric motor driven mechanical machines dominated the computing world until the German inventor konrad Zuse constructed the first electronic calculating machine. The punched cards used in computer systems are often called Hollerith cards. The first general-purpose.

Zilog and many more recognized the demanding requirement of powerful microprocessors to the design world. At first. The bit Microprocessor: The addressed an expanded memory size 16 Kbytes and contained additional instruction. Microprocessors were then used very extensively for many application developments. The main problem with this early microprocessors were its speed. Many companies like Intel. Although only slightly more advanced than an microprocessor.

Later Intel introduced The main advantages of the were its internal clock generator. Intel corporation introduced Intel Corporation released the an extended 8-bit version of Most of the instructions in can be executed in a single clock instead of two clocks compared to The clock speed of was increased.

Even applications which involve floating-point numbers were using the microprocessors. Microprocessor 10EC62 memory than the Applications such as spread sheets. The has bit data bus and a bit memory addresses. The included a memory management unit that allowed memory resources to be allocated and managed by the operating system. This led Intel to introduce the microprocessor.

The instruction set was similar to except few instructions for managing extra 15 Mbytes of memory. Dept of ECE. The bit Microprocessors: The Microprocessor: The was available in a few modified versions such as SX. The bit microprocessor also provided more internal register storage space that the 8-bit microprocessor. The microprocessor: The has like microprocessor.

There are 3 types of buses — Address bus. The block diagram comprises of three blocks-memory system. The Pentium microprocessor was introduced late in with higher speeds compared to Pentium II.

A bus is a set of common connections that carry the same type of information. Data bus and Control bus in a computer system. The Microprocessor-based personal computer system: The block diagram of a microprocessor-based computer system The above figure a shows the block diagram of a microprocessor based personal computer system.

After Pentium. The memory system is divided into three main parts: The memory structure remains same for all the Intel 80x86 through Pentium IV personal computer systems. Fig b illustrates the memory map of a personal computer system. Microprocessor 10EC62 Fig b: The memory map of the personal computer The type of microprocessor in the personal computer system determines whether XMS exists or not.

The first 1M bytes of memory are called the real or conventional memory because each Intel microprocessor is designed to function in this area by using its real mode of operation. The memory map shown in fig c illustrates how the many areas of the TPA are used for system programs. It also shows a large area of memory available for application programs. Microprocessor 10EC62 a. Fig d shows the system area of a typical computer system.


The IO. The size of the driver area and number of drivers change from one computer to another. The video BIOS. The size and amount of memory used depends on the type of the video display adapter attached to the system. The System Area: These application programs include word processors. The length of the system area is k bytes. The free TPA area holds application programs as they are executed. If a hard disk memory is attached to the computer.

These are stored in the TPA so they can be changed as the system operates. CAD programs and many more. One area is 16 bytes in length and is located at the top of TPA. Mouse etc. The other is much larger and is located near the bottom of TPA. Microprocessor 10EC62 in an AT system. The expanded memory system allows a 64k byte page frame of memory to be used by application programs. This area is often open or free in newer systems. The microprocessor is the heart of the microprocessor-based computer system.

The microprocessor performs three main tasks for the computer system: To read data from a port.

To write data to a port. Simple Microcomputer Bus Operation 1. Microprocessor 10EC62 Although. The memory outputs the addressed instruction or data word to the CPU on the data bus. The CPU writes a data word to memory by sending out an address on the address bus. The CPU in a microcomputer fetches instructions or reads data from memory by sending out an address on the address bus and a Memory Read signal on the control bus.

Data from the port comes into the CPU on the data bus. A microcomputer fetches each program instruction in sequence. Maximum Mode and Minimum Mode. Microprocessor 10EC62 Pin Description: GND — Pin no. VCC — Pin no. Eight —bit oriented devices tied to the lower half would normally use A0 to condition chip select functions.

A0 is analogous to BHE for the lower byte of of the data bus. T4 bus. TW and T4. During T1 these are the four most significant address lines for memory operations. T1 and T2 and is returned to the passive state 1. S7 Pin Description S2. Pin no. S1 or S0 during T4 is used to indicate the beginning of a bus cycle and the return to the passive state in T3 or TW is used to indicate the end of a bus cycle.

Any change by S2. These status lines are encoded as shown. If it is tristated another bus master has taken control of the system bus. A Dept of ECE. This input is internally synchronized. NMI — Pin no. Value of Interrupt Enable flag S6bar NMI is not maskable internally by software. Always low logical indicating is on the bus. A subroutine is vectored to via an interrupt vector lookup table located in system memory.

HOLD is not an asynchronous input. External synchronization should be provided if the system can not otherwise guarantee the setup time. Simultaneous with the issuance of HLDA the processor will float the local bus and control lines. This signal is active HIGH. INTR is internally synchronized. HLDA — Pin no. To be acknowledged. Microprocessor 10EC62 subroutine is vectored to via an interrupt vector lookup table located in system memory. It can be internally masked by software resetting the interrupt enable bit.

ALE — Pin no. It is active LOW during T2. T3 and TW of each interrupt acknowledge cycle. WR is active for T2.

It is active LOW. Note that ALE is never floated.


Microprocessor 10EC62 Write: It is used to control the direction of data flow through the transceiver. T3 and TW of any write cycle. Pulses are active LOW. There must be one dead CLK cycle after each bus exchange.

Each master-master exchange of the local bus is a sequence of 3 pulses. During a T4 or T1 clock cycle. If the request is made Dept of ECE. A locked instruction is not currently executing. QS0 — Pin no. Current cycle is not the first acknowledge of an interrupt acknowledge sequence. Current cycle is not the low byte of a word on an odd address 3.

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QS1 and QS0 provide status to allow external tracking of the internal instruction queue. Request occurs on or before T2. This signal is active LOW. Type O Read: T3 and TW of any read cycle. This signal is used to read devices which reside on the local bus.

It is LOW during T1 for the first interrupt acknowledge cycle. It restarts execution. Correct operation is not guaranteed if the setup and hold times are not met.

Eight bit oriented devices tied to the upper half of the bus would normally use BHE to condition chip select functions. The signal must be active HIGH for at least four clock cycles. Pin No. This input is synchronized internally during each clock cycle on the leading edge of CLK. RESET is internally synchronized. The S. T3 and T4. Local bus will be released during the next clock.

The Bus Interface Unit consists of segment registers. If the local bus is idle when the request is made the two possible events will follow: A memory cycle will start within 3 clocks. Once this address is sent out of BIU. Now the four rules for a currently active memory cycle apply with condition number 1 already satisfied. This can be subdivided into two parts. The bit scratch pad registers can be split into two 8-bit registers. Different registers and their operations are listed below: Register Operations AX Word multiply.

The results of these operations can affect the condition flags. Microprocessor 10EC62 Execution Unit: The execution unit consists of scratch pad registers such as bit AX.

Byte Divide. For example. BP Base Pointer and finally index registers such as source index and destination index registers. Word divide. Loops Dept of ECE. The segment registers and their default offsets are given below.

Microprocessor 10EC62 a: Microprocessor 10EC62 d: Addressing modes for accessing immediate and register data register and immediate modes. Data Addressing Modes of The has 12 addressing modes. Subsequent addresses are sent out and the queue is filled upto 6 bytes. The execution of instruction in is as follows: The microprocessor unit MPU sends out a bit physical address to the memory and fetches the first instruction of a program from the memory.

The instructions are decoded and further data if necessary are fetched from memory. Addressing modes for accessing data in memory memory modes C. Machine language: Addressing modes of When executes an instruction. After the execution of the instruction.


These data are called its operands and may be part of the instruction. B bus and C bus. The various addressing modes can be classified into five groups. Microprocessor 10EC62 D. MOV BH. MOV DX. The operand to be accessed is specified as residing in an internal register of Example 1: MOV CL. Relative addressing mode E. Immediate addressing mode: In this mode. CH is an illegal instruction. Example 2: It must use the BIU. MOV CH. Direct addressing mode: The instruction Opcode is followed by an affective address.

Microprocessor 10EC62 B. The Execution Unit EU has direct access to all registers and data for register and immediate operands. In the direct addressing mode. The default segment is always DS. However the EU cannot directly access the memory operands. Then BIU generates the 20 bit physical address H. MOV CX. Example 3: MOV [DI].

The 20 bit physical address is computed using DS and EA. The content of BX is moved to memory locations H and H. MOV AL. Based addressing mode: Microprocessor 10EC62 8 bit content of memory location is moved to CH.

Register indirect addressing mode: Physical address: String addressing mode: Based Indexed addressing mode: ALPHA — Indexed addressing mode: Port number is an 8 bit immediate operand.

IN AX. Microprocessor 10EC62 The string instructions automatically assume SI to point to the first byte or word of the source operand and DI to point to the first byte or word of the destination operand. OUT 05 H. The port number is taken from DX. Relative addressing mode: Implied addressing mode: Instruction using this mode have no operands. CLC which clears carry flag to zero.

Special functions of general-purpose registers: In 8 bit multiplication, one of the operands must be in AL. The other operand can be a byte in memory location or in another 8 bit register.

In 16 bit multiplication, one of the operands must be in AX. The other operand can be a word in memory location or in another 16 bit register. BX register: In instructions where we need to specify in a general purpose register the 16 bit effective address of a memory location, the register BX is used register indirect.

CX register: In Loop Instructions, CX register will be always used as the implied counter. In these instructions the port address, if greater than FFH has to be given as the contents of DX register. Instruction execution timing Instruction Format: The instruction sizes vary from one to six bytes. The OP code occupies six bytes and it defines the operation to be carried out by the instruction. Register Direct bit D occupies one bit. It defines whether the register operand in byte 2 is the source or destination operand.

The second byte of the instruction usually identifies whether one of the operands is in memory or whether both are registers. This byte contains 3 fields. MOD 2 bits. Register field occupies 3 bits. It defines the register for the first operand which is specified as source or destination by the D bit.

MOD selects memory mode. The 6 bit Opcode for SUB is SUB Bx. The W bit must be 1 to indicate it is a word operation.

The 4 byte code for this instruction would be 89 96 34 12H. The D bit must be o. The w bit must be 1 to indicate it is a word operation. Thus the 5 byte code for this instruction would be 3E 89 96 45 23 H. In this example. HD disp. Assembler instruction format. This generates only a 4 byte code. Illustration of these instructions with example programs. The other operand can come from another register. In particular. Either the source or destination has to be a register.

For example: The first operand has to be a register and the result is stored in that register. Microprocessor 10EC62 For example: MOV BX. Problems in the decoding of the instruction and the operation of the pipeline are responsible for this strange turn of events. As of the If you do not want to execute the loop when cx contains zero.

Since this instruction decrements cx then checks for zero. If you want to extend the range of this instruction. The reason is quite simple. You can use this instruction anywhere you want to decrement cx and then check for a Dept of ECE. This instruction does the following: This instruction is quite useful The 80x86 Instruction Set after cmp or cmps instruction.

Move on to next array element. The loop instruction does not affect any flags.

This instruction is useful if you need to repeat a loop while some value is equal to another. Max 16 array elements.

Index into the array note next inc. Either the zero flag is clear or the instruction decremented cx to zero. Microprocessor 10EC62 zero result. By testing the zero flag after the loop instruction with a je or jne instruction. Repeat if it is. Otherwise it fell through because the zero flag was set.

Jump if all elements were zero. The algorithm is cx: Microprocessor 10EC62 cmp Array[bx]. If the zero flag is clear at that point. See if this element is zero.

If you want to output data to the port. If the target address is out of range. In a real system.

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Suppose bit 7 of input port h contains a one if the device is busy and contains a zero if the device is not busy. Maximum of array elements. Robust programs usually apply a timeout to a loop like this.

Get port test al. You can use the loopne instruction to repeat some maximum number of times while waiting for some other condition to be true. Does this element contain zero? If the device fails to become busy within some specified Dept of ECE. Quit if it does. Index into array. See if bit 7 is one jne WaitNotBusy. Both eight. Input port address mov cx. Get data at port.

Repeat if busy and no time out. Microprocessor 10EC62 amount of time. The following code will accomplish this: The Logical Instructions: See if busy loopne WaitNotBusy. These are bt. Rotate and Bit Instructions The 80x86 family provides five logical instructions. Loop The and. These instructions can manipulate bits. The logical instructions are and.

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The and later processors provide an even richer set of operations.LEA will not affect the flags. The possible exceptions. Get H. The following code sequences provide examples of this usage: The result in AX is moved. Noticethat the xor operation will produce a zero result if and only if Dept of ECE. The following examples illustrate the use of macros.